Trifold frequency multiplier based on mixer for the feedback system of BEPC II
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DOI

10.26689/jera.v3i6.1059

Submitted : 2019-12-01
Accepted : 2019-12-16
Published : 2019-12-31

Abstract

This paper will introduce the structure, development process, test and experiment of trifold frequency multiplier by using mixer and its application in accelerator fields. This invent includes a power splitter, a frequency doubler, a mixer, a bandpass filter, an amplifier and several RG233 cables. One 500MHz signal which always is provide by the timing system of the accelerator is input to a power splitter, a power splitter could divide one signal into two signals with equal magnitude, one is directly input to the LO port of mixer, the other is input to frequency doubler then 1.0 GHz signal will be got. This 1.0 GHz signal is input to the RF port of the mixer, then output at IF port of mixer, the frequency of the IF port signal is sum and difference of 500MHz and 1.0GHz, so 500MHz and 1.5GHz signal will be got. Then this signal is input to a bandpass filter whose centre frequency is 1.5GHz, so a clean 1.5GHz signal is got. The trifold frequency multiplier by using mixer is simple to operate, and it has good performance. In the experiments, the 500MHz signal was passed through the Trifold Frequency Multiplier to get the 1.5GHz signal, and its output amplitude stability is 0.49%, and its synchronization stability is 10.3 ps compared with the 500MHz input signal.